SystemC to Verilog converter

This is a program written in Python that will automatically convert a SystemC program to verilog. This program takes as input, a SystemC program that is written in an RTL style and converts it to a verilog RTL program. The latest project tarball can be downloaded by going to the link below. The tarball contains an example SystemC program as well as files necessary to run the example in both a SystemC and Verilog simulation environment. Please refer to the included README file to find out where to get open source versions of SystemC and Verilog.

The development model used in this example is one where a simulation environment is first set up in SystemC. A test fixture is set up that will generate input stimuli to the module under development (example.h/cpp). When the performance of the module meets expectations, the module can then be converted to verilog using the sysc2ver.py program. This new verilog file (example.v) can then be run in a verilog simulation environment using the included verilog test fixture files and run scripts.

The purpose of this development environment is to be able to design RTL style code in a SystemC environment. This means that the RTL code can also be run with higher level SystemC or C code that would match what might be run in a system that included a microprocessor. Being able to simulate the hardware and software of a system in a single development environment makes for a development environment that performs much faster than what would happen in a mixed mode development environment. In fact, because SystemC is based on C++ and because the code is compiled to an executable binary file, the speed of the simulation is much faster than any interpreter based simulation environment.

Anyone wishing to contribute to this project can do so by making changes to any of the files in the distribution tarball then emailing it back to me through link below. Just let me know what release version the changes were made to and which files were modified. I will then do a diff on the release the changes were based on and include those changes in the next release if appropriate. Please provide contact information in case I have questions and so I can properly credit your work.